EPM7128S Datasheet (PDF) - Altera Corporation - Programmable Logic Device Family
The MAX 7000 family of high-density, high-performance PLDs is based on Altera’s second-generation MAX architecture. Fabricated with advanced CMOS technology, the EEPROM-based MAX 7000 family provides 600 to 5,000 usable gates, ISP, pin-to-pin delays as fast as 5 ns, and counter speeds of up to 175.4 MHz. MAX 7000S devices in the -5, -6, -7, and -10 speed grades as well as MAX 7000 and MAX 7000E devices in -5, -6, -7, -10P, and -12P speed grades comply with the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 2.2. See Table 3 for available speed grades.
Logic array blocks
Expander product terms (shareable and parallel)
Programmable interconnect array
I/O control blocks
MAX 7000 Device Family Data Sheet
Integrated Circuits (ICs)
Embedded - CPLDs (Complex Programmable Logic Devices)
In System Programmable
Delay Time tpd(1) Max
Voltage Supply - Internal
4.75 V ~ 5.25 V
Number of Logic Elements/Blocks
Number of Macrocells
Number of Gates
Number of I /O
0°C ~ 70°C
Package / Case
Supplier Device Package
Warranty :180days for all goods
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EPM7128SQC100-15N EPM7128SQC100-10N EPM7128SQC100-15F